1. Field of the Invention
The present invention relates to a semiconductor device and a fabrication method thereof. More particularly, the present invention relates to a semiconductor device including an insulation film and a method of fabrication thereof.
2. Description of the Background Art
In the past years, intensive efforts have been taken to reduce the size of interconnections and provide multilayers for the purpose of further increasing the integration density of semiconductor integrated circuit devices. An interlayer insulation film is provided between each interconnection to obtain a multilayer structure of the interconnection. If the surface of this interlayer insulation film is not planar, a step-graded portion will be generated at the interconnection formed above the interlayer insulation film. This will cause defects such as disconnection. Therefore, the surface of the interlayer insulation film (the surface of the device) must be made as flat as possible. The technique to planarize the surface of the device is called planarization. This planarization technique has become important in reducing the size and providing multilayers of the interconnection.
In planarization, an SOG (Spin On Glass) film is known as an interlayer insulation film that is generally used. Recently, development in the planarization technique taking advantage of fluidity of a material of the interlayer insulation film is particularly noticeable.
An "SOG" is a generic term of a film mainly composed of a solution in which a silicon compound is dissolved in an organic solvent, and silicon dioxide formed from that solution.
In forming an SOG film, first a solution having a silicon compound dissolved in an organic solvent is applied in droplets on a rotated substrate. By this rotation, the solution coating is provided so as to alleviate the step-graded portion on the substrate corresponding to the interconnection. More specifically, the coating is formed thick at the concave portion and thin at the convex portion on the substrate. As a result, the surface of the solution coating is planarized.
Then, heat treatment is applied to vaporize the organic solvent. Also, polymerization proceeds to result in a planarized SOG film at the surface.
An SOG film is typically classified into an inorganic SOG film that does not include any organic component in a silicon compound, as represented by the following general formula (1), and an organic SOG film including an organic component in a silicon compound, as represented by the following general formula (2). EQU [SiO.sub.2 ]n (1) EQU [R.sub.x SiO.sub.y ]n (2)
(n, X, Y: integer; R: alkyl group or aryl group)
An inorganic SOG film includes a great amount of moisture and hydroxyl group. It is more brittle than a silicon oxide film formed by CVD (Chemical vapor Deposition). There is a disadvantage that a crack is easily generated during the heat treatment when the thickness of the inorganic SOG film is greater than 0.5 .mu.m.
In contrast, an organic SOG film does not have any cracks generated during the heat treatment, and the film thickness can be set to approximately 0.5-1 .mu.m. Therefore, the usage of an organic SOG film allows the formation of a thicker interlayer insulation film. This means that sufficient planarization can be achieved even for a great step-graded portion on a substrate.
As described above, inorganic and organic SOG films have superior planarization. However, the great amount of moisture and hydroxyl group included in an inorganic SOG film will reduce the insulation property and adversely affect a metal interconnection and the like to induce the problem of degrading the electrical characteristics and the action of corrosion.
A similar problem is seen in an organic SOG film. This is because, though smaller in comparison to an inorganic SOG film, the organic SOG film includes some amount of moisture and hydroxyl group.
There is also a problem that the adhesion of an inorganic SOG film and an organic SOG film with the underlying metal interconnection is poor.
To compensate for the disadvantages when an SOG film is employed as an interlayer insulation film, an insulation film such as a silicon oxide film formed by, for example, plasma CVD, having the characteristics of insulation and mechanical strength and adhesion in addition to the property of blocking moisture and hydroxyl group is provided between the SOG film and the metal interconnection.
However, the provision of an insulation film formed by plasma CVD between an SOG film and a metal interconnection newly induces the following problem. In the case where the insulation film is formed by plasma CVD, it is difficult to provide the insulation film adequately between the patterns of the underlying metal interconnection if the distance therebetween is reduced. This constraint in reducing the distance between patterns of the underlying metal interconnection will become a bottleneck in reducing the size of the elements. A silicon oxide film formed by plasma CVD has a dielectric constant higher than that of an organic SOG film. Therefore, the capacitance between the interconnection is increased to become the cause of signal delay.
Thus, the conventional method of providing an insulation film formed by plasma CVD between an SOG film and a metal interconnection for the purpose of improving the insulation and adhesion of an SOG film superior in planarization induces the problem of impending microminiaturization of an element in addition to become the cause of signal delay.